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[CSharp] FIFO

Description: 页面置换算法的实现源码。主要为OS初学者提供参考。-Page replacement algorithm implementation source code. The main reference for the OS for beginners.
Platform: | Size: 3072 | Author: zhang | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 基于fpga的异步FIFO的设计和实现源代码-Fpga-based asynchronous FIFO design and implementation of source code
Platform: | Size: 3072 | Author: liyaning | Hits:

[Com Port] 51_uart_fifo51

Description: 51_uart_fifo51 串口收发程序源代码 环形缓冲区实现-Serial transceivers to achieve ring buffer source code
Platform: | Size: 48128 | Author: willigo | Hits:

[VHDL-FPGA-Verilog] fifo.vhdl

Description: 异步fifo的vhdl源代码,可实现异步信号的传送-The asynchronous fifo vhdl source code, enabling the transmission of asynchronous signals
Platform: | Size: 9216 | Author: 高丽 | Hits:

[VHDL-FPGA-Verilog] FIFO-verilog

Description: 两种异步FIFO设计以及源代码（Verilog）-Two asynchronous FIFO design and source code (Verilog)
Platform: | Size: 12288 | Author: 范先龙 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 异步FIFO Verilog源代码，对控制读写地址进行设计，以便写满和读空只产生一个标志，实现对FIFO的缓冲控制-Asynchronous FIFO Verilog source code, designed to control read and write addresses in order to fill and read empty produce only one flag, the FIFO buffer control
Platform: | Size: 3072 | Author: zx | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 模拟页式虚拟存储管理中硬件的地址转换和用先进先出调度算法处理缺页中断.虽然是文档文件，其源代码可以直接拷贝至C++运行，并且文档最后给出相应执行结果。-Simulation of the hardware address translation page of virtual storage management and FIFO scheduling algorithm for processing a page fault, although it is a document file and its source code can be directly copied to the C++ run, and the end of the document gives the corresponding results of the implementation.
Platform: | Size: 58368 | Author: hwq | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 异步FIFO源代码，由模块调用自动生成，不包含测试向量。-Asynchronous FIFO source code automatically generated by the module calls, does not contain the testbench.
Platform: | Size: 2048 | Author: Yang Siyu | Hits:

[Other] fifo

Description: 异步fifo ,verilog 源代码，含工程文件，modosim 下运行-Asynchronous fifo verilog source code containing the project file run modosim
Platform: | Size: 175104 | Author: zhaoyibin | Hits:

[Software Engineering] fifo

Description: 这篇文档主要是描述了fifo的作用，里面有用verilog写的源码，及其综合后的结果-This document mainly describes the role of the FIFO inside useful verilog to write source code, and its consolidated results
Platform: | Size: 410624 | Author: 王慧 | Hits:

[source in ebook] FIFO

Description: FPGA内部FIFO存储器设计的vHdl源代码-FPGA internal FIFO memory design vHdl source code
Platform: | Size: 1024 | Author: 罗智勇 | Hits:

[SCM] FIFO

Description: arm应用fifo缓冲区应用源码 适用于多个arm系列芯片-arm applications fifo buffer application source code for multiple arm series chips
Platform: | Size: 1024 | Author: 谷伟民 | Hits:

[source in ebook] fifo

Description: fifo的实现，通信集成电路设计的作业，包含模块源程序，源代码，适合初学者。-The realization of FIFO, communication circuit operation,Module design, test vector，source code,Suitable for beginners,Convenient experiment,Very good, right
Platform: | Size: 920576 | Author: wangyi | Hits:

[DSP program] FIFO-simplify-0227

Description: DSP2812 与上位机通讯FIFO堆栈模式源代码-DSP2812 and PC communication FIFO stack mode source code
Platform: | Size: 233472 | Author: noya | Hits:

[Other] OV7670-Camera-Module-with-FIFO

Description: it is a source code to drive camera
Platform: | Size: 1444864 | Author: suleyman | Hits:

[Algorithm] source-(1)

Description: FIFO Algorithm Source Code
Platform: | Size: 1024 | Author: Dorsa | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: FIFO，先进先出缓冲器，verilog源代码，包括测试代码。-FIFO, FIFO buffer, verilog source code, including test code.
Platform: | Size: 2048 | Author: 项中元 | Hits:

[USB develop] SLAVE-FIFO-16BITS

Description: CY7C68013a的slavefifo的固件源代码，keil编写，以及使用FPGA向EP6端点写数据的verilog源代码，没有错误，可以编译成功!-CY7C68013a of slavefifo firmware source code, keil prepared using FPGA and write data to the endpoint EP6 verilog source code, no errors, you can compile successfully!
Platform: | Size: 223232 | Author: 向新铭 | Hits:

[USB develop] gpif_to_extfifo-fifo-rw

Description: USB GPIF 接口编程源码，经过验证-The source code for USB GPIF. It was verifed.
Platform: | Size: 168960 | Author: fangliang | Hits:

[VHDL-FPGA-Verilog] fifo

Description: FIFO源码以及测试文件基于ISE14，Verilog语言编写，全部工程。-FIFO based on source code and test files ISE14, Verilog language, the whole works.
Platform: | Size: 414720 | Author: 期望 | Hits:
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